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Method for configuring an FPGA for large FFTs and other vector rotation computations
Method for configuring an FPGA for large FFTs and other vector rotation computations
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机译:配置用于大型FFT和其他向量旋转计算的FPGA的方法
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摘要
A method using replication of distributed arithmetic logic circuits and recursive interpolation of reduced angular increments of sine and cosine sum constants in logic look-up tables, permits the computation of vector rotation and large FFTs in a unitary field programmable gate array chip without required off-chip memory for storing constants.
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