Method of implementing electron beam lithography using uniquely positioned alignment marks and a wafer with such alignment marks

摘要

A plurality of alignment marks are formed on a semiconductor wafer in an area which is separate from or non-coincident with outside a plurality of chip regions, such as in a periphery of the wafer, irrespectively of the size and arrangement of the chip regions. Such wafers, which are previously manufactured, are then subjected to electron beam exposure in accordance with circuit design data. The electron beam exposure is typically implemented through global alignment using the alignment marks.