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CIRCUIT DESIGN APPARATUS, CIRCUIT DESIGN METHOD AND COMPUTER-READABLE RECORDING MEDIUM IN WHICH CIRCUIT DESIGNING PROGRAM IS STORED

机译:存储电路设计程序的电路设计装置,电路设计方法和计算机可读记录介质

摘要

PROBLEM TO BE SOLVED: To realize reduction in cost and time for circuit design. ;SOLUTION: A circuit design apparatus is provided with wiring means 116 and 117, which determine wiring between cells according to cell detailed layout results, a timing analyzing means 114 which executes timing analysis by using wiring information, a control means 121 which discriminates the presence or absence of timing violation, a detour wiring identifying means 120 which identifies detouring wiring in the wiring and a violation reason analyzing mean 119 which discriminates whether the cause for the timing violation lies in the detouring wring, and if the timing violation is caused by the detouring wiring, a brief or detailed wring operation is performed again.;COPYRIGHT: (C)2001,JPO
机译:要解决的问题:实现电路设计的成本和时间的减少。 ;解决方案:一种电路设计设备,其具有:布线装置116和117,其根据单元详细的布局结果确定单元之间的布线;时序分析装置114,其通过使用布线信息执行时序分析;控制装置121,其用于判断是否存在布线。有无时序违规,,回布线识别装置120,其识别布线中的de回布线;以及违规原因分析装置119,其识别时序违规的原因是否在ing回布线中,以及是否由于时序偏差而引起。绕线布线,再次进行简短或详细的拧紧操作。;版权所有:(C)2001,JPO

著录项

  • 公开/公告号JP2001093983A

    专利类型

  • 公开/公告日2001-04-06

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP19990269531

  • 申请日1999-09-22

  • 分类号H01L21/82;G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 01:28:12

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