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HANDLING THE EXCEPTIONS IN THEORETICAL INSTRUCTIONS

机译:处理理论指导中的例外

摘要

CPU overhead is minimized through tracking speculative exceptions (202) for later processing during exception resolution (204) including pointing to the addresses of these speculative instructions, and resolving (204) these exceptions by correcting (206) what caused the exception and re-executing (208) the instructions which are known to be in a taken path. Tracking speculative exceptions has two components which use an exception bit which is set in response to an exception condition (213). The invention tracks an original speculative exception which occurs when a speculative instruction whose operand(s) do not have any exception bits set encounters an exception condition. Speculative exception resolution is triggered when a non-speculative instruction-which is in the taken path of a conditional branch-uses an operand from a register having its exception bit set. The presence of an exception condition and a non-speculative instruction yields an exception signal (220) to exception resolution (204). Speculative exception resolution (204) includes responding to output signals from the extra register and extra exception bit for correcting (204) the exception condition which caused the exception and re-executing (208) the instructions which depended on the results of the instructions causing the speculative exception. This invention also handles the case where a speculative instruction attempts to use a register having its exception bit set as above.
机译:通过跟踪推测性异常(202)以在异常解决(204)期间进行后续处理来最小化CPU开销,包括指向这些推测性指令的地址,以及通过纠正(206)导致异常的原因并重新执行来解决(204)这些异常。 (208)已知在采用路径中的指令。跟踪推测性异常具有两个组件,它们使用响应于异常条件而设置的异常位(213)。本发明追踪原始的推测异常,该原始推测异常在其操作数没有设置任何异常位的推测指令遇到异常条件时发生。当非推测性指令(位于条件分支的采用路径中)使用来自其异常位已设置的寄存器中的操作数时,就会触发推测性异常解析。异常条件和非推测性指令的存在产生异常信号(220)到异常解决(204)。推测性异常解决(204)包括响应来自额外寄存器和额外异常位的输出信号,以校正(204)引起异常的异常条件,并重新执行(208)取决于导致该异常的指令结果的指令。投机例外。本发明还处理推测指令试图使用其异常位如上所述设置的寄存器的情况。

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