An on-chip monitoring circuit is composed of a plurality of individually addressable nodes (206, 208, 210, 212, 214) that are connected together in a circuit (200) which extends from an external data port to each of the monitored circuit points. Address and enable information is passed from node to node. Each node contains address decoding circuitry and enable generation circuitry. As a node receives address information, it decodes part of the address information and enables some of the nodes connected to it, passing the remainder of the address information to the enabled nodes. This process continues until an end node is reached which is connected to the circuit point which is to be monitored. Data generated at the monitored point is passed back through the enabled nodes to the external data port.
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