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PROCESS FOR PLANARIZATION AND RECESS ETCHING OF POLYSILICON IN AN OVERFILLED TRENCH

机译:沟槽过剩中多晶硅的平面化和应力蚀刻过程

摘要

The invention is directed to a process for forming a recess in at least one poly silicon overfilled trench in an integrated circuit, comprising the following steps: uniformly etching the poly silicon overfill layer (4); stopping the etching before the poly silicon layer (4) is completely removed from the surface of the integrated circuit; and recess etching the polysilicon layer (4) with microtrenching properties for forming a substantially planar recess (6) near the top of the at least one trench (3).
机译:本发明涉及一种用于在集成电路中的至少一个多晶硅过度填充沟槽中形成凹槽的方法,该方法包括以下步骤:均匀地刻蚀该多晶硅过度填充层(4);和在从集成电路表面完全去除多晶硅层(4)之前,停止蚀刻;刻蚀具有微沟槽特性的多晶硅层(4),以在至少一个沟槽(3)的顶部附近形成基本上平坦的凹槽(6)。

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