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SEMICONDUCTOR DEVICE FOR REDUCING CHARGE IMPACT GENERATED BY PLASMA ETCHING PROCESS AND MANUFACTURING METHOD THEREOF

机译:减少等离子体刻蚀过程产生的电荷影响的半导体装置及其制造方法

摘要

A kind of purpose: method, for manufacturing, for reducing, the semiconductor device that the charge generated by a plasma etching process impacts is arranged to improve load effect and one fowler-Nordheim tunnel(l)ing current of reduction or direct tunnel current generate in a gate, in a plasma etching process, by forming a cervical orifice of uterus on gate both sides there is charge to penetrate an insulating layer. Construction: a gate pattern formation is in the semi-conductive substrate for passing through a plasma etching method. One sub- gate pattern is formed in the both sides of big door model, so that the quantity of electric charge is reduced by the plasma in an etch process of the insulating layer by big door model.
机译:一种目的:布置用于减少由等离子体蚀刻工艺产生的电荷影响的半导体器件的方法,以改善负载效果,并产生一个福勒-诺德海姆隧道(I)的减小电流或直接隧道电流在栅极中,在等离子蚀刻工艺中,通过在栅极两侧形成子宫的宫颈孔,电荷会穿透绝缘层。构造:在半导体衬底中形成栅极图案,以通过等离子体蚀刻方法。在大门模型的两侧形成一个子栅图案,从而在通过大门模型的绝缘层的蚀刻工艺中通过等离子体减少电荷量。

著录项

  • 公开/公告号KR20000073970A

    专利类型

  • 公开/公告日2000-12-05

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO LTD.;

    申请/专利号KR19990017598

  • 发明设计人 LEE HWI SEUNG;KIM YEONG GWANG;

    申请日1999-05-17

  • 分类号H01L21/334;

  • 国家 KR

  • 入库时间 2022-08-22 01:14:32

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