MICROPROCESSOR SYSTEM INCLUDING MICROPROCESSOR AND METHOD OF CONTROLLING BUS CYCLE OF MICROPROCESSOR

摘要

PURPOSE: To first execute other processing by interrupting a bus cycle under execution when another processing is requested on the condition that no READY signal is returned from the opposite party for a long time although a microprocessor issues a bus cycle. CONSTITUTION: This system uses a bridge chip 12 provided with a bus retry output part for outputting a bus retry (BRTY) signal and a microprocessor (MPU) 10 provided with a bus retry discriminating part for discriminating the presence/absence of the BRTY signal inputted from the bridge chip 12, a bus cycle control part for temporarily interrupting the bus cycle under execution and executing it again later when this bus retry discriminating part detects the input of the BRTY signal, an interrupt discriminating part for discriminating the presence/absence of another processing request when the bus cycle is interrupted and an interrupt control part for executing the other processing before the re-execution of the bus cycle when that interrupt discriminating part detects the other processing request.