METHOD FOR CREATING A SIMULATION ENVIRONMENT FOR ENHANCED LOGIC VERIFICATION OF A BRANCH HISTORY TABLE

摘要

PURPOSE: A method is provided for generating simulation environment for improved logic verification of branch history table by providing a step for coupling a test instruction stream for logic from the logic to a shadow array as a result for supplying test signal output to be checked. CONSTITUTION: By activating a unit simulation instruction generator, the first test instruction stream is provided for the logic of an instruction processing unit to be tested as a data stream which, simulates an instruction stream but does not contain a specified instruction. Then, the test instruction stream for the logic is coupled from the logic to the shadow array as a result for supplying the signal output to be checked. In such a simulation environment, a behavioral (4) and a shadow array (3) link a random instruction stream generator (1) and a BHT array loader (2) with the other verification method.