首页> 外国专利> DOUBLE POLYSILICON PROCESS FOR PROVIDING SINGLE CHIP HIGH PERFORMANCE LOGIC AND COMPACT EMBEDDED MEMORY STRUCTURE AND RESULTING CHIP STRUCTURE

DOUBLE POLYSILICON PROCESS FOR PROVIDING SINGLE CHIP HIGH PERFORMANCE LOGIC AND COMPACT EMBEDDED MEMORY STRUCTURE AND RESULTING CHIP STRUCTURE

机译:提供单芯片高性能逻辑紧凑型嵌入式存储器结构和结果芯片结构的双多晶硅工艺

摘要

PURPOSE: A semiconductor and its fabricating method are provided to fabricate of both compact memory and high performance logic on the same semiconductor chip. CONSTITUTION: An unreacted cobalt or titanium(66) covering the horizontal surfaces of the nitride logic spacer(62) is removed by a wet etching process. Then a barrier nitride layer(72) is deposited over the entire surface of chip(9), followed by a dielectric(73) such as a layer of flowable doped glass, for example Boro-Phospho Silicate Glass(BPSG) or fluorinated BPSG(F-BPSG), which is then densified. Dielectric(73) may be polished level with memory gate stack(42), or may extend above the stack(42) by several thousand Angstroms.
机译:目的:提供一种半导体及其制造方法,以在同一半导体芯片上制造紧凑型存储器和高性能逻辑。组成:覆盖在氮化物逻辑间隔物(62)水平面上的未反应的钴或钛(66)通过湿法蚀刻工艺去除。然后将氮化物阻挡层(72)沉积在芯片(9)的整个表面上,然后沉积电介质(73),例如一层可流动的掺杂玻璃,例如硼磷硅酸盐玻璃(BPSG)或氟化BPSG( F-BPSG),然后将其压实。介电层(73)可以与存储栅堆叠(42)一起抛光,或者可以在堆叠(42)上方延伸几千埃。

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