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Method for receiving of asynchronous serial data in paging transceiver

机译:在寻呼收发器中接收异步串行数据的方法

摘要

The present invention can easily receive other serial data in which the additions and changes without changing design of other serial data received, the microprocessor due to the feature additions and changes to the microprocessor on the slave controller of the paging transmitters through its external port as one of the asynchronous serial data receiving method of paging transmitters so that,; The present invention stores the half-bit time value and the total bit length value in data received by connecting the received data channel is assigned to a different port on the microprocessor, with the send and receive the serial port of the first channel to the external port to the memory, and an external interrupt and to detect the start bit, the method comprising: prohibiting external interrupt after detecting a falling edge of the start bit; Further comprising: a set of data bits a half-time of the external interrupt falling edge of the timer value after the prohibition in the above step, and enable him, and half-frame set to 1 and the timer interrupt; When the timer interrupt occurs after the step of setting the timer value to a full bit time data and initializes the half frame to determine that he is the first half-frame is he first half frame and the Cree data count and the receive buffer; Reading a single bit at that time to Kerry, and then the increase in the data counter and increases the counter data is judged less than 9 is less than 9 if the movement of the bits in the receive buffer to the right, and then waits for the next timer interrupt is generated; Characterized in that it comprises the step of: at said step of data counter 9 is a parity frame movement thereof received and Kerry, the data is stopped, the timer interrupt is greater than 9, and detect the early start bit falling edge.
机译:本发明可以容易地接收其中增加和改变的其他串行数据,而无需改变接收到的其他串行数据的设计,由于功能的增加和改变,微处理器通过其外部端口通过寻呼机的外部端口对寻呼发送机的从控制器进行了改变。寻呼发射机的异步串行数据接收方法,以便;本发明将半位时间值和总位长值存储在通过连接接收到的数据通道而接收到的数据中,分配给微处理器上的另一个端口,并通过第一通道的串行端口向外部发送和接收该方法包括以下步骤:在检测到起始位的下降沿之后,禁止外部中断。进一步包括:一组数据位,在上述步骤中禁止之后,定时器值的外部中断下降沿的一半时间,并使其使能,并将半帧设置为1,并且定时器中断;当在将定时器值设置为全比特时间数据并初始化半帧的步骤之后发生定时器中断时,确定该半帧为前半帧,即前半帧,Cree数据计数和接收缓冲区;当时向克里读一位,然后在数据计数器中增加并在计数器数据中增加,如果接收缓冲区中的位向右移动,则判断小于9小于9,然后等待下一个定时器中断产生;其特征在于包括以下步骤:在数据计数器9的所述步骤是接收到的奇偶校验帧并对其进行嘉里运动,停止数据,定时器中断大于9,并检测早期起始位下降沿。

著录项

  • 公开/公告号KR100290426B1

    专利类型

  • 公开/公告日2001-05-15

    原文格式PDF

  • 申请/专利权人 NULL NULL;

    申请/专利号KR19990022353

  • 发明设计人 주대현;

    申请日1999-06-15

  • 分类号H04B5/04;

  • 国家 KR

  • 入库时间 2022-08-22 01:12:20

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