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1 PIPELINED SNOOPING OF MULTIPLE L1 CACHE LINES
1 PIPELINED SNOOPING OF MULTIPLE L1 CACHE LINES
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机译:1条多条L1缓存线的管道窥探
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摘要
The cache system of the present invention accesses the set associative cache without increasing the critical path delay, reduces the drawback of increased latency of cache access, reduces snoop busy time, and provides response to MRU misses and cache misses. do. A two level cache subsystem is provided that includes an L1 cache and an L2 cache. The cache directory is accessed for the second snoop request while the directory access from the first snoop request is being evaluated. During the REQUEST stage, a directory access snoop on the directory of the L1 cache is required; During the ACCESS stage in response to this request, the cache array is accessed while the results from the SNOOP stage are processed. If multiple data transfers are required from the L1 cache, pipeline retention is issued to the request and snoop stages, and the access stage is repeated. During the FLUSH stage, cache data read from the L1 cache is transferred to the L2 cache during the access stage.
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