Asynchronous serial data receiver/transmitter arrangement has correction devices for controlling time between first, second bit data reception/transmission by serial-parallel converter

摘要

The arrangement has a receiver correction device (2) for controlling the time interval between a first time at which the receiver receives first bit data into a serial-parallel converter (3) and a second time at which it receives second bit data into the converter. A control signal generator (1) controls a data shift signal according to the correction signal and the converter adopts the bit rate of the transmitted data on the basis of the data shift signal. The transmitter has a similar arrangement.