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Semiconductor SRAM with reduced storage cell area and improved data retention interval has negative resistance section with tunnel insulating layer formed on active p-type region
Semiconductor SRAM with reduced storage cell area and improved data retention interval has negative resistance section with tunnel insulating layer formed on active p-type region
The negative resistance section (10a) includes a tunnel insulating layer (10t) producing the tunnel effect and is formed on the active p-type region (17a) with a relatively high concentration of lattice imperfections. In the tunnel insulation layer n-type polysilicon is formed. An Independent claim is included for the corresponding method of manufacture.
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