首页> 外国专利> Production of conducting pathways on an integrated chip comprises applying a stacked dielectric layer, carrying out photolithography, etching, applying conducting material and removing, and applying an insulating layer

Production of conducting pathways on an integrated chip comprises applying a stacked dielectric layer, carrying out photolithography, etching, applying conducting material and removing, and applying an insulating layer

机译:在集成芯片上产生导电路径的步骤包括:施加堆叠的介电层,执行光刻,蚀刻,施加导电材料并去除以及施加绝缘层

摘要

Production of conducting pathways on an integrated chip comprises: (i) applying a stacked dielectric layer; (ii) carrying out photolithography to define contact holes (30); (iii) etching the holes; (iv) applying conducting material and removing outside of the holes; (v) applying an insulating layer (50); (vi) carrying out photolithography to define conducting pathways; (vii) etching conducting pathway trenches (80); and (viii) applying conducting material and removing outside of the trenches. Production of conducting pathways on an integrated chip comprises: (a) applying a stacked dielectric layer consisting of a lower (21) and an upper dielectric layer (22) with an antireflection layer (60) arranged between them; (b) carrying out photolithography to define contact holes (30) in the dielectric layer; (c) etching the holes in the stacked layer; (d) applying conducting material and removing the material outside of the holes so that recesses (40) are formed over the contact holes; (e) applying an insulating layer (50); (f) carrying out photolithography to define conducting pathways in the region of individual contact holes on the insulating layer; (g) etching conducting pathway trenches (80) in the insulating layer and the upper dielectric layer lying underneath so that the antireflection layer acts as an etch stop; and (h) applying conducting material and removing the material outside of the trenches and the recesses over the contact holes. Preferred Features: The insulating layer is made from silicon nitride. The antireflection layer is a light-absorbing inorganic material, especially silicon oxynitride. Polycrystalline silicon is used to fill the contact holes and tungsten is used to fill the trenches and the recesses above the contact holes.
机译:在集成芯片上产生导电路径的步骤包括:(i)施加堆叠的介电层; (ii)进行光刻以限定接触孔(30); (iii)蚀刻孔; (iv)施加导电材料并去除孔的外部; (v)施加绝缘层(50); (vi)进行光刻以定义导电路径; (vii)蚀刻导电路径沟槽(80); (viii)施加导电材料并去除沟槽的外部。在集成芯片上产生导电路径的步骤包括:(a)施加由下层(21)和上层介电层(22)组成的堆叠介电层,在它们之间设置抗反射层(60); (b)进行光刻以在介电层中限定接触孔(30); (c)蚀刻堆叠层中的孔; (d)施加导电材料并去除孔外部的材料,从而在接触孔上方形成凹槽(40); (e)施加绝缘层(50); (f)进行光刻以在绝缘层上的各个接触孔的区域中限定导电路径; (g)在绝缘层和位于其下方的上介电层中蚀刻导电路径沟槽(80),以使抗反射层用作蚀刻停止层; (h)施加导电材料并去除位于接触孔上方的沟槽和凹槽之外的材料。优选特征:绝缘层由氮化硅制成。防反射层是吸光的无机材料,尤其是氮氧化硅。多晶硅用于填充接触孔,钨用于填充沟槽和接触孔上方的凹槽。

著录项

  • 公开/公告号DE10021098C1

    专利类型

  • 公开/公告日2001-09-20

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE2000121098

  • 发明设计人 LEHR MATTHIAS;LEIBERG WOLFGANG;

    申请日2000-04-20

  • 分类号H01L21/768;H01L23/525;

  • 国家 DE

  • 入库时间 2022-08-22 01:09:49

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