Semiconducting memory component with redundancy circuit has temporary memory cells on data lines for replacing faulty cells in memory blocks in response to faulty cell addresses

摘要

The memory component has a number of memory blocks (4), each contg. memory cells arranged in rows and columns and a number of data lines coupled to the memory blocks, whereby data are entered into the memory cells via data lines and output from them. Temporary memory cells (20-35) are arranged on the data lines for replacement of defective memory cells within the memory blocks in response to addresses of defective memory cells.