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improved semiconductor memory with a zeilenauswahlsignal ausgebendem zeilendekoders
improved semiconductor memory with a zeilenauswahlsignal ausgebendem zeilendekoders
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机译:具有行解码器的改进的半导体存储器,行解码器输出行选择信号
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摘要
In a semiconductor memory circuit 100 according to the present invention, a column decoder 103 outputs column selecting signals to column lines (CL), whose output part is formed of inverter (125). A driving potential to be supplied to the inverter is set lower than a power supply potential Vcc supplied from outside. With this arrangement, a timing at which a bit line is connected to a data bus is determined by an amplification rate of a potential on the bit line, thereby providing the semiconductor memory device which performs a high speed and reliable operation. IMAGE
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