首页> 外国专利> METHOD OF PLASMA ETCHING DOPED POLYSILICON LAYERS WITH UNIFORM ETCH RATES

METHOD OF PLASMA ETCHING DOPED POLYSILICON LAYERS WITH UNIFORM ETCH RATES

机译:均匀蚀刻速率的等离子体蚀刻掺杂多晶硅层的方法

摘要

In wafer semiconductor manufacture, a method of etching an arsenic doped polysilicon layer down to a patterned boro-phospho-silicate-glass (BPSG) layer provided with a plurality of openings with an uniform etch rate is disclosed. The method relies on a combination of both system and process improvements. The system improvement consists to hold the wafer in the reactor during the etch process with an electrostatic chuck device to have a perfect plasma environment around and above the wafer. On the other hand, the process improvement consists in the use of a non dopant sensitive and not selective chemistry. A NF3/CHF3/N2 gas mixture with a 11/8.6/80.4 ratio in percent is adequate in that respect. The etch time duration is very accurately controlled by an optical etch endpoint detection system adapted to detect the intensity signal transition of a CO line at the BPSG layer exposure. The process is continued by a slight overetching. When the above method is applied to the doped polysilicon strap formation in DRAM chips, excessive or insufficient etching of the polysilicon layer is avoided, so that the doped polysilicon strap thickness is thus much more uniform, opening to opening, within a wafer.
机译:在晶片半导体制造中,公开了一种将砷掺杂的多晶硅层蚀刻到具有多个具有均匀蚀刻速率的开口的图案化的硼磷硅玻璃(BPSG)层的方法。该方法依赖于系统和过程改进的结合。系统改进包括在蚀刻过程中使用静电吸盘设备将晶片固定在反应器中,以在晶片周围和上方具有理想的等离子体环境。另一方面,工艺改进在于使用对非掺杂剂敏感且非选择性的化学物质。在这方面,以比例为11 / 8.6 / 80.4的NF3 / CHF3 / N2气体混合物就足够了。蚀刻持续时间由光学蚀刻终点检测系统非常精确地控制,该光学蚀刻终点检测系统适于检测在BPSG层曝光时CO线的强度信号转变。通过略微过度蚀刻来继续该过程。当将上述方法应用于DRAM芯片中的掺杂的多晶硅条带形成时,避免了多晶硅层的过多或不足的蚀刻,因此掺杂的多晶硅条带的厚度因此更加均匀,在晶圆内开口。

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