Method for forming super-steep retrograded channel (SSRC) for cmos transistor using rapid laser annealing to reduce thermal budget

摘要

A method for making a ULSI MOSFET chip includes forming a sacrificial gate on a substrate along with activated source and drain regions, but without initially establishing a doped channel region. The polysilicon portion of the sacrificial gate is then removed and a neutral ion species such as Silicon or Germanium is implanted between the source and drain regions in the region that is to become the doped channel region. A dopant substance is next implanted into the channel region, which is then exposed to ultra-rapid thermal annealing to cause the dopant to form a box-like, super-steep retrograded channel profile. The gate is then re-formed over the now activated doped channel region.