Semiconductor memory device incorporating potential generation circuit with rapid rise of output potential

摘要

A positive voltage generation circuit used in data erasure and programming with respect to a memory cell includes a positive voltage charge pump circuit generating a voltage higher than the power supply voltage, and a decouple capacitor. When the positive voltage charge pump is rendered inactive, the decouple capacitor is disconnected from an output node by a P channel MOS transistor prior to the fall of the potential at the output node. The decouple capacitor is connected to the output node again when the positive voltage charge pump is rendered active. Since the potential of the output node does not have to be boosted from the beginning by virtue of charge redistribution, power consumption can be reduced correspondingly.