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Method and apparatus for measuring subthreshold current in a memory array

机译:用于测量存储器阵列中的亚阈值电流的方法和设备

摘要

An integrated circuit (100) includes an array of memory cells (102), each memory cell coupled to a word line (220, 222, 224) and a bit line (226). The integrated circuit further includes a first external connection (202) configured to receive a variable voltage and a second external connection (210) configured to provide an operating parameter of the integrated circuit. First logic circuitry (204) is coupled to the first external connection and word lines of the array of memory cells and is configurable in one of a normal mode and a test mode in response to a first control signal. The first logic circuitry conveys the variable voltage to the array in the test mode.
机译:集成电路( 100 )包括存储单元( 102 )的阵列,每个存储单元耦合到字线( 220、222、224 >)和一条位线( 226 )。该集成电路还包括配置为接收可变电压的第一外部连接( 202 )和配置为提供集成电路的工作参数的第二外部连接( 210 ) 。第一逻辑电路( 204 )耦合到存储单元阵列的第一外部连接和字线,并且可响应于第一控制信号而以正常模式和测试模式之一进行配置。第一逻辑电路在测试模式下将可变电压传送到阵列。

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