Patch-flatness test unit for high order rational surface patch rendering systems

摘要

A high order surface patch rendering system with adaptive tessellation. A patch is rendered by subdividing a patch until the subpatches are sufficiently flat that they can be approximated by a quadrilateral. To determine when a subpatch is flat enough to be approximated with a quadrilateral, the patch rendering system uses a patch flatness test unit which tests the straightness of the edges and internal curves of the subpatch. The edges and internal curves of a subpatch are determined to be straight if the intermediate control points of a curve are within a tolerance range of a straight line between the curve's endpoints. The tolerance range is chosen with respect to a pixel resolution of the final image so that subpatch is determined to be flat when the curvature of the subpatch cannot be perceived relative to a flat surface. One embodiment contemplates a flatness test unit for determining the flatness of a patch having a set of control points. The flatness test unit comprises a series of stages. The first stage is configured to receive and store the set of control points. The second stage is coupled to the first stage to receive pairs of control points and configured to determine control point coordinate differences. The third stage is coupled to the second stage to receive the control point coordinate differences and configured to determine absolute values of the control point differences. The fourth stage is coupled to the third stage to receive absolute values of the control point coordinate differences along with the control point differences and configured to determine multiplicand pairs. The fifth stage is coupled to the fourth stage to receive and multiply multiplicand pairs to determine products. The sixth stage is coupled to the fifth stage to receive products and configured to determine control point deviations and deviation tolerances. The seventh stage is coupled to the sixth stage to receive the control point deviations and deviation tolerances and configured to determine a deviation flag to indicate if the control point deviations are less than the deviation tolerances. The eighth stage is coupled to the seventh stage to receive the deviation flag and determine edge straightness and patch flatness flags.