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Techniques and circuits for high yield improvements in programmable devices using redundant routing resources

机译:使用冗余路由资源提高可编程设备中良率的技术和电路

摘要

The present invention provides a method and apparatus for high yield improvements in programmable logic devices using redundancy. The present invention concerns a programmable logic device comprising a plurality of routings lines coupled to a plurality of logic blocks when programmed. During programming, a path is routed through the routing lines by programming the selected programmable elements. The selected programmable elements are located at each interconnect point between at least two routing lines or two segments of a routing lines along the path. The programmable elements include at least two interconnect circuits coupled in parallel. The programmable element is successfully programmed when at least one of the interconnect circuits is functional after programming.
机译:本发明提供了一种使用冗余在可编程逻辑器件中高产量改进的方法和设备。本发明涉及一种可编程逻辑器件,该可编程逻辑器件包括在被编程时耦合到多个逻辑块的多个布线。在编程过程中,通过对选定的可编程元件进行编程,可通过路径路由路径。所选择的可编程元件位于沿着路径的至少两条路由线或路由线的两段之间的每个互连点处。可编程元件包括至少两个并联耦合的互连电路。当至少一个互连电路在编程之后起作用时,可编程元件被成功编程。

著录项

  • 公开/公告号US6237131B1

    专利类型

  • 公开/公告日2001-05-22

    原文格式PDF

  • 申请/专利权人 QUICKLOGIC CORPORATION;

    申请/专利号US19990301685

  • 发明设计人 JAMES MACARTHUR;TIMOTHY LACEY;

    申请日1999-04-28

  • 分类号G06F175/00;G06F190/00;G06F111/60;

  • 国家 US

  • 入库时间 2022-08-22 01:04:15

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