首页> 外国专利> Current source using merged vertical bipolar transistor based on gate induced gate leakage current

Current source using merged vertical bipolar transistor based on gate induced gate leakage current

机译:使用基于栅极感应的栅极泄漏电流的合并垂直双极晶体管的电流源

摘要

A current source formed in a p-type substrate is disclose. First, a deep n-well is formed within the p-type substrate and a buried n+ layer is formed within the deep n-well. Next, a p-well is formed within the deep n-well and atop the buried n+ layer. The p-well and deep n-well are then surrounded by an isolation structure that extends from the surface of the substrate to below the level of the p-well. A n+ reference structure is formed within the p-well and a gate is formed above the p-well, the gate separated from the substrate by a thin oxide layer, the gate extending over at least a portion of the n+ reference structure. Finally, a n+ output structure is formed within the p-well. An input reference current is provided to the n+ reference structure and an output current is provided by the n+ output structure.
机译:公开了一种形成在p型衬底中的电流源。首先,在p型衬底内形成深n阱,然后掩埋n+在深n阱内形成层。接下来,在深n阱内并在掩埋的n&plus顶上形成p阱。层。然后,p型阱和深n型阱被隔离结构围绕,该隔离结构从衬底的表面延伸到p型阱的水平以下。一个n+在p阱内形成参考结构,并且在p阱上方形成栅极,该栅极通过薄氧化物层与衬底隔开,该栅极在n&plus的至少一部分上延伸。参考结构。最后,一个n+输出结构在p阱内形成。输入参考电流提供给n+参考结构,输出电流由n&plus提供。输出结构。

著录项

  • 公开/公告号US6255713B1

    专利类型

  • 公开/公告日2001-07-03

    原文格式PDF

  • 申请/专利权人 TAIWAN SEMICONDUCTOR MANUFACTURING CORPORATION;

    申请/专利号US19990362916

  • 发明设计人 MIN-HWA CHI;

    申请日1999-07-27

  • 分类号H01L290/00;

  • 国家 US

  • 入库时间 2022-08-22 01:03:57

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