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Circuit and method for fast squaring by breaking the square into a plurality of terms

机译:通过将平方分为多个项来快速平方的电路和方法

摘要

A squaring circuit includes an input terminal that carries a k-bit input value. The k-bit input value has left m-bit and right (k−m)-bit portions representing respective left and right hand values. A left hand squaring circuit receives the left hand m-bit portion and generates a first term bit group representing a square of the left hand value. A multiplier multiplies the left hand m-bit portion and the right hand (k−m)-bit portion to generate a second term bit group representing a product of the left and right hand values. A right hand squaring circuit generates a third term bit group representing a square of the right hand value. An adder adds the second term bit group with a concatenation of the first and third term bit groups and generate the square of the k-bit input value.
机译:平方电路包括携带k位输入值的输入端子。该k位输入值具有代表各个左手和右手值的左m位和右(k&m)位部分。左方平方电路接收左手m位部分,并生成代表左手值平方的第一项位组。乘法器将左手的m位部分和右手的(k&m)位部分相乘,以生成表示左手值和右手值的乘积的第二项位组。右方平方电路产生代表右值平方的第三项位组。加法器将第二项位组与第一项和第三项位组的串联相加,并生成k位输入值的平方。

著录项

  • 公开/公告号US6260056B1

    专利类型

  • 公开/公告日2001-07-10

    原文格式PDF

  • 申请/专利权人 ATI INTERNATIONAL SRL;

    申请/专利号US19980138301

  • 发明设计人 PARIN B. DALAL;

    申请日1998-08-21

  • 分类号G06F73/80;

  • 国家 US

  • 入库时间 2022-08-22 01:03:53

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