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Method of forming dual gate oxide layers of varying thickness on a single substrate

机译:在单个衬底上形成厚度不同的双栅氧化层的方法

摘要

A method for manufacturing a semiconductor device that includes dual gate oxide layers made of two dielectric layers of varying thickness on a single wafer. In an example embodiment, a semiconductor structure is fabricated by providing a first layer of a dielectric over a semiconductor material and covering the first layer with a protective second dielectric layer adapted to mask the first layer. The first and second layers are then removed over a region of the semiconductor material while the second layer is used to protect the first layer, therein leaving the region of semiconductor material substantially exposed. A third layer of dielectric material is formed over the first and second layers and the adjacent exposed semiconductor material region; a gate material is then formed over the third dielectric layer. Finally, an etching step etches through the gate material and underlying layers to the semiconductor material to form a thick gate region and a thin gate region. The thick and thin gate regions can be formed on the same substrate using substantially the same manufacturing process.
机译:一种用于制造半导体器件的方法,该方法包括在单个晶片上由厚度变化的两个介电层制成的双栅氧化层。在示例实施例中,通过在半导体材料上方提供电介质的第一层并且用适于掩蔽第一层的保护性第二电介质层覆盖第一层来制造半导体结构。然后在半导体材料的区域上方去除第一层和第二层,同时第二层用于保护第一层,其中使半导体材料的区域基本暴露。在第一和第二层以及相邻的暴露的半导体材料区域上方形成第三电介质材料层;然后在第三介电层上方形成栅极材料。最后,蚀刻步骤蚀刻穿过栅极材料和下面的层到半导体材料,以形成厚的栅极区域和薄的栅极区域。可以使用基本相同的制造工艺在同一基板上形成厚栅区和薄栅区。

著录项

  • 公开/公告号US6262455B1

    专利类型

  • 公开/公告日2001-07-17

    原文格式PDF

  • 申请/专利权人 PHILIPS SEMICONDUCTOR INC.;

    申请/专利号US19990431841

  • 发明设计人 EMMANUEL DE MUIZON;JEFFREY LUTZE;

    申请日1999-11-02

  • 分类号H01L297/20;

  • 国家 US

  • 入库时间 2022-08-22 01:03:47

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