首页>
外国专利>
RTL analysis for improved logic synthesis
RTL analysis for improved logic synthesis
展开▼
机译:RTL分析可改善逻辑综合
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method of generating synthesis scripts to synthesize integrated circuit (IC) designs in RTL level description into gate-level description comprising the steps of identifying hardware elements in the RTL code, determining key pins for each of said identified hardware elements, extracting design structure and hierarchy from the RTL code, generating script to cause a logic synthesis tool to apply bottom-up synthesis to modules and sub-modules of the IC design, generating script to cause a logic synthesis tool to apply top-down characterization to modules and sub-modules of the IC design and generating script to cause a logic synthesis tool to repeat said bottom-up and said top-down applications until certain predetermined constraints are satisfied.
展开▼