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Sidewall process and method of implantation for improved CMOS with benefit of low CGD, improved doping profiles, and insensitivity to chemical processing

机译:具有低CGD,改善的掺杂分布以及对化学处理不敏感的优点的用于改进CMOS的侧壁工艺和注入方法

摘要

A transistor (30) and method for forming a transistor using an edge blocking material (24) is disclosed herein. The edge blocking material (24) may be located adjacent a gate (22) or disposable gate or may be part of a disposable gate. During an angled pocket implant, the edge blocking material (24) blocks some dopant from entering the semiconductor body (10) and the dopant (18) placed under the edge blocking material is located at a given distance below the surface of the semiconductor body (10).
机译:本文公开了一种晶体管( 30 )和使用边缘阻挡材料( 24 )形成晶体管的方法。边缘阻挡材料( 24 )可以位于浇口( 22 )或一次性浇口附近,也可以是一次性浇口的一部分。在成角度的口袋注入过程中,边缘阻挡材料( 24 )阻挡了一些掺杂剂进入半导体本体( 10 )和掺杂剂( 18 )放置在边缘阻挡材料下)位于半导体本体表面( 10 )下方的给定距离处。

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