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2 value data compressions/the extension circuit, use those 2 value data transfer systems, and 2 value data compressions/the extension manner
2 value data compressions/the extension circuit, use those 2 value data transfer systems, and 2 value data compressions/the extension manner
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机译:2值数据压缩/扩展电路,使用那些2值数据传输系统,以及2值数据压缩/扩展方式
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摘要
PROBLEM TO BE SOLVED: To allow a method to have provision for high rate transfer without the need for a basic clock at a high frequency even when data compression or expansion is applied to binary data whose transfer rate is high. SOLUTION: A discrimination circuit 132 discriminates whether binary image data in x-bit are all '0s' (all '1s') data or mixed data of '0s' and '1s'. In the case of the mixed data, an output circuit 136 adds header information denoting a fact of mixed data to the binary image data in x-bit and outputs the resulting data to a transmission line 30. In the case of all '0's' (all '1s') data, a detection circuit 134 detects how many numbers of the all '0s' (all '1s') data being the binary image data in x-bit are consecutive. The output circuit 136 adds header information denoting a fact of all '0s' (all '1s') data to the binary image data in x-bit representing the detection result and outputs the resulting data to the transmission line 30.
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