Production manner, super minute patterning manner of semiconductor equipment and production manner null

摘要

Prepn. comprises on the layer (2) to be etched another layer (3), with a lower or the same etch rate, is deposited in the form of adjacent hemispheres. The deposition time is controlled to give a required distance between tops and valleys in the layer. The layer may be etched down partially after deposition to adjust these distances. A 2nd. layer (4), with an even lower etch rate, is deposited to planarise the surface. The top layer (4) is etched down until the tops of the hemispheres in the 1st. masking layer (3) show. Then, using the top layer (4) as masks the 1st. layer (2) and the intermediate layer (3) are etched down. Also claimed is the process in which the 3rd. layer (4) is not used, and the masking action is provided by the layer (3) which has a lower etch rate than the 1st. layer (2). USE/ADVANTAGE - The structures give a large increase of active capacitor area, resulting in an increase in capacitance value. The process does not require a photo lithographic process, and results in structures with a cross-section dimension of 0.1 micron. The process is used in the mfr. of DRAMs.