CLOCK GENERATOR FOR GENERATING FREQUENCY JITTER SYSTEM CLOCK

摘要

PROBLEM TO BE SOLVED: To provide a system clock generator capable of largely reducing interference.;SOLUTION: This clock generator is provided with a random number generator 1 and a phase modulator 4, and an integrator 3 for integrating random numbers z1 and z2 is inserted between the random number generator 1 and the phase modulator 4, and the output of the integrator 3 controls the phase value of the phase modulator 4 by integration pa; j'. The integrator 3 is connected to a check device 7, and the check device 7 interferes during the random numbers z1 and z2, or interposes in an integration process so that preliminarily decided limit values G1, G1'; G2, G2'; and G3, G3' of the integration pa; j' can not be exceeded.;COPYRIGHT: (C)2002,JPO