Tester architecture construction data generating method, tester architecture constructing method and test circuit

摘要

The present invention provides a test circuit configuration technology suitable for use in a semiconductor device, which is capable of testing the semiconductor device without using a commercially-available tester (test device) and is less reduced in required cost. A test program related to a semiconductor device to be tested, which is described in tester language, is analyzed. Components of a test circuit (ALPG), corresponding to the contents of each test to be carried out are extracted, i.e., unwanted or unnecessary components are deleted to thereby generate the description (test circuit architecture construction data) of a circuit capable of conducting tests in desired test units according to HDL (Hardware Description Language).