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Clocked differential cascode voltage switch with pass gate logic
Clocked differential cascode voltage switch with pass gate logic
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机译:带门逻辑的时钟差分共源共栅电压开关
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摘要
A logic circuit and associated method are provided to improve the switching performance of integrated circuit devices. The logic circuit includes first and second complementary control logic circuits (e.g., pass transistor circuits), first and second capacitors each having one plate connected to a first potential and another plate connected to a respective one of first and second complementary outputs of said logic circuit, a differential cascode voltage switch circuit, comprising at least first and second transistors each having gates cross-coupled to said first and second complementary outputs, and precharge circuitry configured to precharge said first and second complementary outputs to a desired (e.g., high) state.
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