Method and system for interfacing a plurality of peripheral devices in a slave group interface device to a bus and a slave group interface device

摘要

A plurality of peripheral devices are interfaced via a Slave Group Interface device to a bus. This allows for the transfer of clock signals, control signals including select signals, and information bits. In particular, the device ORs peripheral read data according to appropriate bit significance levels. In the absence of a write control signal all peripheral write data are maintained at an inconsequentiality level. Various control signals received from the peripheral devices are parallel-compacted to a compacted bus control signalization.