System and method for efficient verification of functional equivalence between design models

摘要

An equivalence checking system and method efficiently determine whether different circuit models are functionally equivalent. The equivalence checking system first verifies the functional equivalence of a first circuit model to a second circuit model. In verifying this equivalence, the equivalence checking system produces mapping point pairs. The equivalence checking system utilizes these mapping point pairs in determining whether other models of the circuit are equivalent to the first model. Since the mapping point pairs are reused by the equivalence checking system, the number of new mapping point pairs needed to verify the functional equivalence of the other models is reduced or eliminated. Accordingly, the overall efficiency of the equivalence checking system is increased.