Method for verifying functional equivalence between a reference IC design and a modified version of the reference IC design

摘要

A method for verifying functional equivalence between a reference integrated circuit (IC) design and a modified version of the reference IC design includes simulating a reference IC design using a simulation stimulus on a test bench and saving the simulation output. The reference IC design corresponds to an IC design model having visibility to comprehensive internal device state. The method may also include simulating a modified version of the reference IC design using the same simulation stimulus on the same test bench, and saving the modified version simulation output. In addition, the simulation outputs of the reference IC design and the modified version are compared to create a comparison result. Lastly, the method may include determining whether the modified version of the reference IC design is functionally equivalent to the reference IC design based upon the comparison result.