首页> 外国专利> System for synthesizing a circuit by re-writing signed variables into unsigned variables and sharing resources for identical operations having different timing

System for synthesizing a circuit by re-writing signed variables into unsigned variables and sharing resources for identical operations having different timing

机译:用于通过将有符号变量重写为无符号变量并共享具有不同定时的相同操作的资源来合成电路的系统

摘要

A circuit synthesizing method for synthesizing a desired circuit from a behavior description indicating the behavior of a design circuit that is created in a hardware description language stores in advance translation rules for re-writing operations using signed variables into operations using unsigned variables, detects operations using signed variables from a behavior description, extracts translation rules associated with the detected signed variables, re-writes said operations using signed variables into operations using unsigned variables according to the extracted translation rules, and based on said re-written behavior description, finds identical operations that do not behave in the same timing and carries out the process of sharing a functional unit.
机译:一种电路合成方法,用于从表示以硬件描述语言创建的设计电路的行为的行为描述中合成所需电路,预先存储转换规则,以将使用有符号变量的操作重写为使用无符号变量的操作,并使用从行为描述中选择带符号的变量,提取与检测到的带符号的变量相关的转换规则,根据提取的转换规则,将使用带符号的变量的所述操作重写为使用无符号的变量的操作,并基于所述重写的行为描述,找到相同的操作它们不会在同一时间运行,而是执行共享功能单元的过程。

著录项

  • 公开/公告号US6367066B1

    专利类型

  • 公开/公告日2002-04-02

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19990237256

  • 发明设计人 KOICHI SATO;

    申请日1999-01-26

  • 分类号G06F175/00;

  • 国家 US

  • 入库时间 2022-08-22 00:47:34

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