Virtual register renamed instruction issue for execution upon virtual/physical rename buffer wrap around detection signaling available physical register

摘要

A method for wrap detection in a microprocessor system, the system including a plurality of rename buffers. The method includes performing a two's complement subtraction of a completion pointer from a target pointer, wherein a carry out results from the subtraction. The method further includes comparing the carryout and a virtual bit associated with a location to produce a result. The result is compared to the most significant bit of the target pointer and if there is a match between the most significant bit of the second pointer and the result, an indication is made that the instruction may issue. A system for utilizing the above method of wrap detection includes a means for performing a two's complement subtraction of a completion pointer from a target pointer, wherein a carry out results from the two's complement subtraction. The system further includes a means for performing an exclusive OR operation using the carry out and a virtual bit associated with a highest rename buffer within the plurality of rename buffers to form a result. An additional means for performing an exclusive OR operation is provided to compare the result with a most significant bit of the target pointer. Finally, an indicating means is provided to indicate a match between the most significant bit of the target pointer and the result, and therefore whether an instruction can be issued.