Power consumption reduction method, power consumption reduction circuit, control circuit, and hard disk drive apparatus

摘要

A power consumption reduction circuit includes a clock frequency downconverting circuit. The clock frequency downconverting circuit downconverts a frequency of a CK signal, which is inputted, when a POR signal inputted is asserted, and outputs the CK signal to an IC selection circuit. In addition, if the POR signal inputted is negated, the clock frequency downconverting circuit outputs the CK signal inputted as it is to the IC selection circuit. A signal outputted from the clock frequency downconverting circuit is supplied to a plurality of ICs through the IC selection circuit.