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First-In First-OUT memory and flag signal generating method thereof

机译:先进先出存储器及其标志信号产生方法

摘要

PURPOSE: A FIFO(First-Input First-Output) memory and a method for generating a flag signal of the FIFO memory are provided to match to a fast system by advancing the occurrence time of the flag signals. CONSTITUTION: The FIFO memory comprises a write address generator for generating a write address by responding to a write clock signal, a read address generator for generating a read address by responding to a read clock signal, and a memory cell array having a plurality of memory cells between a plurality of write/read word lines and a plurality of write/read bit lines, storing the write data by responding to the write address and outputting the read data by responding to the read address. A flag generator generates a full flag signal by responding to the write clock signal in case that the following write address and the present read address is same and generates an empty flag signal by responding to the read clock signal in case that the present write address and the following read address is same.
机译:目的:提供一种FIFO(先入先出)存储器和一种用于生成FIFO存储器的标志信号的方法,以通过提前标志信号的出现时间来匹配快速系统。组成:FIFO存储器包括:写地址发生器,用于通过响应写时钟信号来产生写地址;读地址发生器,用于通过响应读时钟信号来产生读地址;以及具有多个存储器的存储单元阵列多个写/读字线和多个写/读位线之间的存储单元,通过响应写地址来存储写数据,并通过响应读地址来输出读数据。如果后面的写地址和当前的读地址相同,则标志产生器通过响应写时钟信号来产生全标志信号,而如果当前的写地址和当前读地址相同,则标志器通过响应读时钟信号来产生空标志信号。以下读取地址相同。

著录项

  • 公开/公告号KR20020052669A

    专利类型

  • 公开/公告日2002-07-04

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20000082094

  • 发明设计人 LEE YEONG JU;LIM JEONG JU;

    申请日2000-12-26

  • 分类号G06F12/02;

  • 国家 KR

  • 入库时间 2022-08-22 00:30:43

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