Memory module testing arrangement e.g. for SDRAM, has test device connected to memory module through bus switches arranged in a tree structure

摘要

A test device (1) is connected to the memory module (5) through bus switches (2-4) that are arranged in a tree structure. A control unit supplies control signals to the bus switches. A pair of tester channels (9,10) respectively supply component specific instruction signal and non-component specific instruction signal to the memory module.