首页> 外国专利> Structure for reducing a voltage drop along a word/bit line operates during the reading of a memory cell in an MRAM memory's memory cell field with the memory cell placed at an intersecting point between selected word and bit lines.

Structure for reducing a voltage drop along a word/bit line operates during the reading of a memory cell in an MRAM memory's memory cell field with the memory cell placed at an intersecting point between selected word and bit lines.

机译:用于减小沿字/位线的电压降的结构在MRAM存储器的存储单元场中的存储单元的读取期间操作,其中该存储单元位于所选字线和位线之间的相交点处。

摘要

Both ends of a selected word line (WL2) are set at a high voltage (V2) to keep the voltage drop on the selected word line as low as possible. A cell (Z22) is read out at an intersecting point between the selected word line and a bit line. Other word lines are set at another voltage level. An Independent claim is also included for a method for reducing the voltage drop along a word/bit line in an MRAM memory.
机译:所选字线(WL2)的两端均设置为高电压(V2),以使所选字线上的电压降保持尽可能低。在所选字线和位线之间的相交点处读出单元(Z22)。其他字线被设置在另一电压电平。还包括一种独立权利要求,所述方法用于减小沿MRAM存储器中的字/位线的电压降。

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