Method for storage of test-bit words of segmented program store e.g. for micro-controlled systems of motor vehicles, esp. braking systems, has address word of program memory address broken down into segment address bits

摘要

A method of storing test-bit words of a segmented (10) program store (4) in a correspondingly segmented parity bit store (3), is characterized in that the parity store in distinction to the program store is not continuously filled with test-words so that it is not continuously addressable, and the addresses of the non-continuously addressable memory zone (2) are assigned certain addresses of the continuously addressable memory zone (1). The address word of the program memory address (1) is broken down into one or more segment address bits (5), one or more test-bits (6) and one or more unused bits (7). The address word of the parity memory address (2) is generated from the segments bit(s), from the zero-bit(s) (8) and from the shifted test-bit(s) (9), the latter being generated from the test bits of the address word by shifting to lower order bits.