Semiconductor memory module testing method involves transmitting additional information along with addresses of defect locations in memory bank, to external test device

摘要

The data is stored in a memory bank having an addressable matrix structure. The elements selected from a group consisting of rows and columns, are subdivided into regions. The defect locations in each region are counted and compared with a threshold value. The comparison results are transmitted as an additional information along with the addresses of defect locations in the memory bank, to an external test device.