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Semiconductor device, such as fusible link semiconductor memory device, has fusible link circuit with its fusible link in series with an assessment transistor having a controlled impedance path
Semiconductor device, such as fusible link semiconductor memory device, has fusible link circuit with its fusible link in series with an assessment transistor having a controlled impedance path
Semiconductor device with fusible link assessment circuit in which the fusible link assessment circuit includes at least one programmable fusible link arranged in series with a controlled impedance path, and a control circuit which changes the impedance of the controlled impedance path, specifically by changing a control node potential.
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