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3 value logical type operation devices

机译:3个值逻辑型运算器

摘要

PROBLEM TO BE SOLVED: To realize a complicated logic operation with a simple system constitution in a small scale by inputting a ternary signal where undecidability (NIL) is allocated as a third truth value in addition to true/false binary, executing a prescribed logic operation and outputting the result of the logic operation as the ternary signal. SOLUTION: When two input signals XA1 and XA2 are inputted to a ternary AND gate 1, an output signal YA is outputted. The lower voltage in the signal voltages of the input signals XA1 and XA2 is outputted as the output signal YA. When the signal voltages of the input signals XA1 and XA2 are identical, the voltage is outputted as the output signal YA. That is, at least one of the input signals XA1 and XA2 which are inputted to the AND gate 1 is '0', the output signal YA becomes '0'. When both input signals XA1 and XA2 are '1', the output signal YA becomes '1'. When the input signals XA1 and XA2 are the combination of 'NIL' and '1' or 'NIL' and 'NIL', the output signal YA becomes 'NIL'.
机译:解决的问题:通过输入三元信号,在小规模的系统结构中实现复杂的逻辑运算,输入三元信号,除了真/伪二进制以外,还将不确定性(NIL)分配为第三真值,执行规定的逻辑运算并将逻辑运算的结果作为三进制信号输出。 SOLUTION:当两个输入信号XA1和XA2输入到三进制AND门1时,输出信号YA被输出。输入信号XA1和XA2的信号电压中的较低电压被输出为输出信号YA。当输入信号XA1和XA2的信号电压相同时,将该电压作为输出信号YA输出。即,输入到与门1的输入信号XA1和XA2中的至少一个为“ 0”,输出信号YA为“ 0”。当输入信号XA1和XA2都为“ 1”时,输出信号YA为“ 1”。当输入信号XA1和XA2是“ NIL”和“ 1”或“ NIL”和“ NIL”的组合时,输出信号YA变为“ NIL”。

著录项

  • 公开/公告号JP3436893B2

    专利类型

  • 公开/公告日2003-08-18

    原文格式PDF

  • 申请/专利权人 株式会社シーエスケイ;

    申请/专利号JP19990062955

  • 发明设计人 中村 和人;

    申请日1999-03-10

  • 分类号H03K19/20;

  • 国家 JP

  • 入库时间 2022-08-22 00:22:40

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