Direct digital frequency synthesizer, phase-locked frequency synthesizer, and transceiver

摘要

PROBLEM TO BE SOLVED: To reduce the memory capacity and to attain the miniaturization and the cost reduction for a frequency synthesizer by calculating the amplitude correction value based on the higher and lower order bits of the phase data obtained by accumulating the inputted frequency setting data and adding the amplitude data on a sine wave obtained based on the higher order bit of the phase data to the calculated amplitude correction value. SOLUTION: A phase accumulator 10 of a direct digital synthesizer 100C accumulates the inputted frequency setting data and outputs this accumulation result as the phase data (1 +2 ). A memory 21B of a phase/amplitude conversion means 20C outputs the amplitude data sin21 , of a sine wave based on a higher order bit 1 of the phase data. An amplitude correction value calculation means 24 calculates and outputs the amplitude correction value cos(21 ).(22 ) based on the bit 1 and a lower order bit 2 of the phase data. Then an adder 23 adds the data sin21 to the value cos(21 ).(22 ) and outputs this addition result.