The interconnect architecture which manages the many low bandwidth connection which minds high bandwidth link

摘要

(57) Abstract The input/output which supports the communication of 1st rate (I/O) the plural devices which possess the port (103) with it possesses several I/O ports and the data processor where each I/O port supports the data communication of 2nd data rate (302) with the data communication architecture which is included (100). 2nd data rate is at least 2 times that 1st data rate. The communication link which is connected to one of the data processor I/O ports (101) supports 2nd data rate. The bridge device (107) is connected to the I/O port of communication link and the plural devices. The bridge device converts the communication link of 2nd data rate to plural communication links of 1st data rate, plural communication links of 1st data rate become independent mutually substantially.