VERIFICATION DEVICE FOR ASYNCHRONOUS CIRCUIT TIMING AND METHOD FOR VERIFICATION OF TIMING

摘要

PROBLEM TO BE SOLVED: To provide a device and a method for verifying timing of asynchronous circuit when a synchronous circuit and an asynchronous circuit are intermingled in a semiconductor integrated circuit.;SOLUTION: When verifying timing of an asynchronous circuit, the present invention reads RTL description from a circuit inputting part 1 in the timing verifying device 14, extracts instances to which restriction is added at a circuit analyzing part 2 and makes the timing restriction and the path restriction described in the instances extracted at the circuit analyzing part 2 into commands at a path and restriction extracting part 3. The timing verifying device reads a clock restriction at a clock condition inputting part 4 and performs timing verification at a restriction information creating part 5 according to the restriction commands and clock restriction information created at the path and restriction extracting part 3.;COPYRIGHT: (C)2003,JPO