(Design rule check)/(electrical rule check) algorithms using a system resolution

摘要

Method and apparatus for checking integrated circuit designs. In particular, one embodiment of the present invention is a method that for checking integrated circuit design files using (design rule check)/(electrical rule check) files (DRC/ERC files) wherein design objects are disposed on a grid having a system resolution, the method comprising steps of: (a) growing one or more rectangular boxes having at least two sides of length equal to the system resolution outward or inward from one or more of an edge of a design object and a side of a design object; (b) performing one or more of a spacing DRC/ERC check and an overlay DRC/ERC check; and (c) identifying checks relating to the rectangular boxes.